Universal Auto Insertion Machine Axial Inserter ^241F PC BOARD FUNCTIONAL/TEST SPECIFICATION

PC BOARD FUNCTIONAL/TEST SPECIFICATION

DESCRIPTION OF ASSEMBLY PCA, SEQ MMIT I/O

PART NUMBER OF ASSEMBLY 47634502, -03, -04

PRODUCT CODE(S) 6241F

RELEASE NUMBER 66764/1018294

RELEASE DATE 4/15/10 (Updated 2/24/10)

  1. product description overview
  1. introduction

The Sequencer MMIT I/O Assy replaces the sequencer I/O box, the Optical Refire controllers, and the 20 AC Out PCBs with a single I/O card that interfaces to the Mini-MIT bus that has been used on the SMT Platform since its inception. The card has 20 DC outputs capable of driving up to 1 amp each at 12 VDC. The card has 40 inputs that are nominally dedicated for low parts and parts missing for the dispensing heads. In addition, the card has a diagnostic port which is not connected to any outputs and 8 general purpose inputs and outputs for other features such as start and stop switches.

  1. history

This card is a new design, but based on experience with Mini-MIT on the platform. The functions of this I/O card are the same as those of the modules it replaces (refire controller, 20 AC Output).

  1. physical description

The card is the same size as the 20 AC Output (5”x15”). The construction is a multi-layer surface mount assembly. To streamline manufacture, as many of the components as possible are surface mount.

  1. Compatibility

This card is designed to completely replace the previous control scheme. The only compatibility to existing equipment is for the dispensing heads and the jumper wire feeder. This card will support the new (stepper controlled) or old feeder. The cabling to the jumper wire feeder, however, is different. This card will not support the older AC valves or the old Refire Det PCBs. DC valves are required and the new Refire Det PCA is needed.

  1. operating features

The Seq MMIT I/O PCA an I/O card optimized for use on the IM sequencers. It has separate connectors for Mini-MIT in and out, and has separate connectors for each of the functions supported. In this way, the cabling can be modular, avoiding massive cable harnesses. All signals are routed through the gate array, which is programmable. Thus, the card’s function can be tailored to suit many diverse needs. The card is designed for low power consumption which reduces the cost of cables and eliminates any thermal problems. All signals going off board are conditioned to protect the board from damage from accidental wiring errors.

  1. operating specifications
  1. electrical power requirements

ï +12 VDC @ 4 A max.

ï +5 VDC @ 2 A max.

ï 24 VAC @ 2.5 A max.

Over current protection for the main +12 VDC and +5 VDC are provided by the power supply. The power supply should not be replaced without due consideration to the over current protection.

  1. Thermal considerations

There are no reasons for concern for any expected thermal conditions in the environment that it will be used in.

  1. inputs

There are 48 inputs that are optically isolated and filtered. These are used for (20) part missing, (20) low parts and (8) general purpose inputs.

  • 5 V OPTO: Inputs are optically isolated with noise rejection. The input signals are referenced to the local +5 VDC supply. The inputs must be pulled below 2.7 VDC (2.3 VDC across the input) to activate the input. To guarantee the inactive state, the input must be above 3.6 VDC. There is a 0.01?F filtering capacitor across the opto-coupler to filter out high frequency noise. In addition, there is debouncing in the gate array to weed out signals shorter than approximately 50 ?s.
  • 12 V OPTO: Inputs are optically isolated with noise rejection. The input signals are referenced to the local +5 VDC supply. The inputs must be pulled below 9.2 VDC (2.8 VDC across the input) to activate the input. To guarantee the inactive state, the input must be above 10.3 VDC. There is a 0.01?F filtering capacitor across the opto-coupler to filter out high frequency noise. In addition, there is debouncing in the gate array to weed out signals shorter than approximately 50 ?s.
  • 24 VAC OPTO: There is one input referenced to 24 VAC for the TEST input from the jumper wire feeder. This input is diode blocked to provide a pulsing signal. There is one pulse per AC cycle. The input pulses are stretched in the gate array to approximately 27 ms. The input line must be pulled below 12 VACrms to guarantee an active signal and must be above 18 VACrms to guarantee an inactive state.
  • TTL INPUT: This is used only for a jumper in the plug that connects to this board to indicate that it is plugged in. This signal does not go off board any distance.
  1. outputs

There are (20) 12 VDC sourcing outputs for valve solenoids. Each is capable of driving up to 1 A. There are 8 general purpose outputs that are also 12 VDC sourcing. In addition, 5 of these general purpose outputs also have AC relays on them capable of sourcing 24 VAC at up to 1 A.

  • O.D. SOURCING: Open drain MOSFET output referenced to the local +12 VDC supply. They are capable of sourcing 1 A each. The total limit of the 12 V supply is 4 A.
  • 24 VAC SOURCING: Triac output supplies 24 VAC at a maximum of 1 A.
  • O.C. Sinking: Open collector TTL output (7407) referenced to the 5 VDC return (GND). These outputs are used for data links to adjacent boards.
  1. connector pin out

Power Input: 15 pin AMP Mate-n-lok connector that supplies +12 VDC, return, +5 VDC, return, 24 VAC, switched 24 VAC, and return, and an external power source.

Jumper Wire Feeder: 6 pin AMP Mate-n-lok connector that supplies 24 VAC, return, the DC output for head 3 and the Out of Wire input for head 3. The output and input are in parallel with the output and input for the dispensing head itself. In addition, there is a Test input from the jumper wire feeder that will manually feed a wire and fire the dispensing head.

Valve Drivers: (4) 10 pin Mod-U connectors supplying 5 sourcing signal lines and 5 return lines. These outputs are open drain P-channel MOSFETs.

Part Missing: (2) 15 socket D-Shell connectors supplying 12 VDC, Return, (10) input signal lines, and a control line for the test function.

Low Parts & Dual Part Sensor: two 25 socket D-Shell connector that supplies 12 VDC, Return, and ten input signal lines each.

Mini-MIT input: 37 pin D-Shell that contains the (13) Mini-MIT pairs of lines as well as four lines to determine address and one line to determine if the previous board was bypassed. These inputs are optically isolated and receive their power from the previous module. There is also a +5 VDC line provided for powering the first module’s input.

Mini-MIT output: 37 socket D-Shell that contains the (13) Mini-MIT pairs of lines, four outputs for address, an input to indicate additional cards follow, and a jumper to differentiate from a bypasses card. If this is the last card in the chain, a terminator plug must be inserted into this connector.

General Purpose I/O: one 26 socket D-Shell connector that supplies 12 VDC, Return, (8) input signal lines, and (8) sourcing output signal lines.

Low Parts Scanners: Two 2 pin AMP Mod-U connectors that have +12 VDC and return to power the light sources. Also, two 4 pin AMP Mod-U connectors to power the receivers and to receive the signal.

Push Buttons: Two 12 pin AMP Mate-n-lok connectors that have +12 VDC and return, an external +12 VDC and return, and two inputs and two outputs.

Beacon: The upper http://buyclomidovulation.com five outputs of the general purpose group also have AC relays that can be used for a beacon. These outputs are on a 6 pin Mod-U connector. These outputs use separate logic out of the gate array and can be re-programmed to operate separately from the general purpose I/O.

6) indicators

The board does not have any LED indicators on any of the inputs or outputs. There is a single digit 7 segment display that will display the address of the card or a fault code. The chart below describes the display.

* – alternating means that the F will appear for 500 milliseconds, then the fault code number will appear for 500 milliseconds, then repeat.

  1. theory of operation

All signals go through the Gate Array (U27). The gate array provides all of the logic necessary for decoding the bus signals, providing any latches or counters necessary, and providing the output signals. The only external components are the interface chips to provide the RS-485 interface, the opto-couplers for the inputs, and the high current drivers for the valves, etc. The logic in the gate array is loaded on every power up and is stored in an 8 pin EPROM (U18) that resides in a socket on the board.

  1. Mini-MIT interface

The card is programmed to respond to four different address ranges: (1300h + “card address” * 10h) is the base address for the valve outputs; (1306h + “card address” * 10h) is the base address for the part missing and low parts inputs; (13C0h + “card address” * 4) is the base address for the diagnostic port and general purpose I/O; and 13FEh on the last module will respond with the size of the sequencer.

  1. card addressing

The card addressing is accomplished with four bits that are passed into and out of each card. These are on pins 14-16 and 33-35 of the Mini-MIT connectors. Four of these lines make up an address. The first module will see all of these lines low when plugged into the inserter. Each card will take the number passed into it, add one, and use that as its address. Each card will pass its address out to the next card. In this way, the first card will see 0, and, adding one, will use an address of 1. This 1 will be passed on to the second card, which will add one to it and use 2 for its address. This process will continue until all the cards have a unique address. These bits are constantly updated (i.e. can dynamically change) until the card is addressed for the first time after power up or reset. At that time, the display will stop flashing and will display a solid digit, which is its address. If a reset occurs, the display will start flashing again, and the address becomes dynamic again, until the card is again accessed. Reset is accomplished globally over the Mini-MIT bus or by cycling power.

There are additional wires in the Mini-MIT cable to determine when there is a cable plugged into the output connector (as opposed to a terminator). This will allow the last card to respond to address 13FEh to provide the size of the sequencer (the number of modules).

There is also a connection on the board to differentiate between a single cable connecting adjacent cards as opposed to two cables in series between adjacent cards. The two cables would only be used if there was a defect in one of the Mini-MIT I/O cards and it was necessary to bypass it. In this case, the card will add 2 to the incoming address instead of just 1. In this way, all subsequent modules will still have their correct addresses. It must be noted that this bypass procedure will only work with one card bypassed. Two adjacent cards cannot be bypassed in this way.

  1. diagnostic port

This is an 8 bit read-write register (at 13C2h + “card address” * 4) that can be used to access various diagnostic features. The function of this port is defined by writing to a write only register (at 130Ch + “card address” * 10h). The following chart outlines the currently implemented features.

  1. part missing inputs

The part missing inputs are latches that are active while the corresponding valve output is active. The latch gets cleared on the leading edge of the valve output. If an input occurs during the time that the output is active (indicating a part present), the latch will be set until the next time that head is fired. The machine controller can read the status of that bit at any time thereafter until the next time that that head is fired.

For troubleshooting purposes, there are three test functions that can simulate the function of the part missing (refire) sensors built into the dispensing heads. Writing a 1 to 13x6h (where ‘x’ indicates module number) clears all of the part missing latches. Writing a 1 to 13x8h issues a 2 ms pulse to the refire boards to simulate a part present in the head. A head must be plugged into the refire jack for this function to test all of the hardware. Writing a 1 to 13xAh enables all of the latches for 2 ms without sending a test pulse to the refire boards. This function makes sure that the latches are not stuck in the active state. A working dispense head must be plugged into the refire jack for this function to operate.

  1. output drivers

The output drivers are optically isolated from the gate array and are SOURCING of 12 VDC (or of 24 VAC in the case of the AC outputs). The outputs are held in a disabled state during power up and until the card is addressed for the first time. This will avoid any possibility of a power up glitch.

  1. optically isolated inputs

The inputs are all isolated from the outside world by opto-couplers. The input section is designed to be used with a 12 VDC reference. It consists of a voltage divider with a small bypass capacitor. This prevents any low amplitude or high frequency noise from causing an input to be registered.

7) VCD DUAL PART SENSOR INPUT

Two optically isolated inputs, LPA pin 1 and LPA pin 2 are used in the dual part sensor application. These sensors inspect for two parts in the chain clip. The counting of the parts is generated in the FPGA, and provided out of the MMIT bus.

In the FPGA, each channel for the dual part sensor counts independently. The MMIT output value that is read is the maximum of these two summed values.

This count can be found by reading bit locations 7,6,5 of the 0x13x4H MMIT address. By writing these bits, the register count is Reset. Bit location #4 is the immediate value of the sensor.

  1. Adjustments

There are no adjustments or setups on this card. The card addressing is automatic. If it becomes necessary in the future to have option settings, they can be implemented in one of two ways. First, they can be hard-coded into the serial EPROM, which is socketed. Alternatively, option settings can be downloaded to registers over the Mini-MIT bus.

  1. supporting documents
  • 47634502 – Seq MMIT I/O Assembly and schematic
  • 47634503 – Seq MMIT I/O Assembly and schematic
  • 47634504 – Seq MMIT I/O Assembly and schematic
  • 47634403 – Seq MMIT I/O fabrication drawing.
  • 47669101 – Functional Spec for the Refire Det PCA.
  • 44901301 – Functional Spec for MiniMIT TO Assy.